Research Project
Primary dissertation research — Computer Architecture
ResearchDistributed Persistent Domain
Manuscript submitted
Memory disaggregation introduces high persist-operation latency that breaks persistent memory programming models. We propose a novel persistent domain abstraction for disaggregated memory systems to address crash consistency at scale.
ResearchDurable Atomic Instructions
Published in DAC 2023, nominated for NVMW 2024
Existing hardware lacks durable atomic instruction support, violating crash consistency in persistent parallel programs. We extend the cache coherence protocol with minimal hardware changes, achieving crash consistency and a 6.4% average speedup on SPLASH-4.
Engineering Project
HardwareBUET LED Driver Controller Digital IC
First iteration fabricated June 2018
Designed a digital controller IC to replace analog boost controllers in LED driver circuits for Solar Home Systems, under BUET-Energypac Research Collaboration HEQEP Sub-Project CP#3817. Implemented in TSMC 180nm technology; first fabrication completed with IO pad mismatch identified for next revision.
HardwareBUET VLSI Standard Cell Library
53-cell library based on TSMC 180nm 7-track technology
Designed and characterized a 53-cell standard cell library (50 digital + 3 analog) based on TSMC 180nm 7-track technology. All cells characterized using Cadence Liberate and Abstract Generator; library was used in the BUET LED driver controller design.
Academic Projects
SoftwareSentiment Analysis of Stocks from Financial News with Twitter Feedback
NLP-based public sentiment analysis augmented with social media data
Analyzed public stock sentiment from financial news headlines, augmented with relevant tweet data to weight social virality. Implemented using Python NLTK; applied to Meta (META), Apple (AAPL), Tesla (TSLA) etc. stock data.
SoftwareBare-Metal Operating System
x86 OS from scratch: bootloader, interrupt handler, keyboard and video driver
Built an x86 OS from scratch in C covering bootloader, interrupt handler, keyboard input, and video driver. Goal was direct understanding of hardware-OS interaction at the bare-metal level.
SoftwareHigh-Accuracy Detection of Early Parkinson's Disease
Multimodal ML reproduction study with updated dataset
Reproduced a multimodal machine learning study for early Parkinson’s detection using an updated dataset. Implemented Logistic Regression, Boosted Tree, and SVM classifiers via MATLAB Classification Learner, achieving near-matching results.
Hardware8-Bit Specialized SAP Microprocessor
Single-bus architecture with custom assembly compiler, designed in Proteus
Designed an 8-bit single-bus SAP2 microprocessor with 64Kbit memory in Proteus, supporting 16 instructions including PUSH and POP. Developed a companion C++ compiler to convert assembly to hex for upload into simulated memory.
Hardware4-Bit Arithmetic Logic Unit with Shifter
12-opcode ALU in 502 MOSFETs, full manual layout in Cadence
Designed an asynchronous 4-bit ALU with shifter supporting 12 opcodes, optimized to 502 MOSFETs using Cadence Design Suite. Full transistor-level layout designed manually as per course requirement.